New fabrication plants and process technologies that
shrink processor dies allow the development of chips that
run faster and at lower voltages without overheating.
Smaller dies also let fabricators squeeze more chips onto
a silicon wafer, thereby increasing yields and slashing
costs. Intel is already moving the 120-MHz Pentium chip onto its next-generation 0.35-micron process. Faster Pentiums will be manufactured on this process, too. Slower 60- to 100-MHz Pentiums (and some 120-MHz chips) will still use the older 0.8- and 0.6-micron technologies. The only other x86 maker that has its own fabrication plants is AMD. Cyrix and NexGen subcontract their manufacturing to other chip makers (Cyrix and NexGen both subcontract with IBM Microelectronics, and Cyrix also deals with SGS Thomson). Intel designed the P6 to run at higher clock speeds to exploit the company's advantages in fab capacity and process technology. To match Intel's clock speeds, AMD is working hard to catch up with Intel and move its K5 onto a similar 0.35-micron process. "We're moving to 0.35 so fast that there will possibly be a mix of both [0.5- and 0.35-micron] parts at first," says Drew Dutton, AMD's strategic marketing manager. "In fact, depending on the timing, we may go entirely with 0.35." NexGen's Nx586 is manufactured on IBM's 0.5-micron process but isn't optimized for it. NexGen hopes to optimize the design and shrink the Nx586 from 192 square millimeters to 118mm^2 by midyear so that the chip will run as fast as Intel's 120- and 133-MHz Pentiums. NexGen says it will move the Nx586 onto IBM's 0.35-micron process late this year, which will reduce the die further and allow clock speeds of over 150 MHz. The Nx686 will probably appear on this process as well. Cyrix faces the biggest manufacturing challenge. The 100-MHz M1 will debut on IBM's 0.65-micron process, yielding a monstrous die of 394mm^2, which is larger than that of any general-purpose CPU. Yields will be so low that analysts wonder how Cyrix will make a profit on the chip. Cyrix says it will decrease the die size to 225mm^2 later this year by using five layers of metal instead of three. In early 1996, the M1 will go on another diet, reducing to a much-more-competitive 169mm^2 by migrating to IBM's 0.5-micron process. This will also enable clock speeds of over 133 MHz. Copyright 1994-1998 BYTE |