All of Intel's P6-class processors use a similar
electrical interface only the physical interfaces are
markedly different. Is this a ploy to make the interfaces
more difficult to clone? No, because the physical
connectors are available from independent suppliers, and
anyone can use them. Intel's patents protect the bus
protocols, not the sockets and slots themselves. Instead, Intel is trying to match each interface to the processor package and to different markets. Here's how they break down: Socket 8 is a 387-pin ZIF socket for the Pentium Pro. It requires a multichip module a special chip package that includes a CPU die and one or two SRAM die for the Level 2 cache (256 KB to 1 MB). The L2 cache can run at the full core frequency of the CPU (currently up to 200 MHz). The Pentium Pro supports an L2 cacheable address space of 64 GB and is found in high-performance desktops and servers. Slot 1 is a 242-contact daughtercard slot that accepts a Pentium II processor packaged as a Single Edge Contact (SEC) cartridge. Inside the cartridge are the CPU die and enough SRAM chips for an L2 cache of up to 512 KB. The current Pentium II supports 512 MB of cacheable address space, much less than a Pentium Pro. Motherboards can have one or two of these slots. The frontside bus usually runs at 66.6 MHz and will increase to 100 MHz when Intel introduces the 440BX system chip set in the first half of 1998. The L2 cache can run at a 1:1, 1:2, or 1:3 ratio of the core frequency. However, it typically runs at 1:2 because higher frequencies would require expensive SRAMs, and Intel aims Slot 1 at mainstream desktops and servers. Slot 2 is a new daughtercard slot that will accept Pentium II processors packaged in a slightly larger SEC cartridge. Slot 2 will not replace Slot 1. Instead, Intel will aim Slot 2 at higher-end desktops and servers. Motherboards can have up to four of these slots for glueless multiprocessing, and even more by using custom chip sets. There's room inside the larger cartridge for more SRAM chips enough for L2 caches well beyond 512 KB. Slot 2 processors will support much more cacheable memory than Slot 1 processors (probably 64 GB). By using expensive burst SRAMs, the L2 cache can run at the full core frequency. The frontside bus won't run slower than 100 MHz. Intel's mobile slot (as yet unnamed) is a physically smaller version of Slot 1 for notebook computers. Otherwise, it's the same as Slot 1. Intel also sells mobile processors on a small card known as a mobile module. Contrary to some reports, future P6 chips aren't necessarily tied to specific slots. For example, the Deschutes processor slated for mid-1998 is simply a Pentium II fabricated on a 0.25-micron process. (Current Pentium II chips are 0.35-micron.) Deschutes will arrive at clock speeds of 333 MHz and higher, and it will gradually replace today's Pentium II. There will be versions for Slot 1, Slot 2, the mobile slot, and the mobile module. Copyright 1994-1998 BYTE |